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 1μm600V HVIC
 
 Overview
        公司提供的1μm 600V HVIC高压浮栅工艺, 拥有200V/600V两个档位的NLDMOS/高压隔离岛。公司的高压互联自屏蔽技术荣获两项发明专利。为电机驱动、白色家电(IPM模块)、大功率LLC、无人机等应用提供了很好的解决方案。
 
 Key Features
- Cost effective mask layer,competitive Rdson and BVdss performance
- Foundry compatible 5V CMOS,20V MV-LDMOS, 200V/600V HVMOS+island
- Rich options included parasitic Zener/JFET
- PDK and industry standard CAD tools are supported
- Supporting Thick metal layer
 
 Application
-Motor driver
-IPM
-LLC
-Unmanned aerial vehicle
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 1.0μm 60V/120V HVIC
 
 Overview
        公司提供的1.0μm 60V/120V HVIC工艺, 拥有高可靠性的LDMOS以及精简的光刻层次,提供60V/120V两个档位的N/PLDMOS以及隔离岛。为手持电动工具、平衡车、无人机等应用提供了很好的解决方案。
 
 Key Features
- Cost effective mask layer,competitive Rdson and BVdss performance
- Foundry compatible 5V CMOS,12V MV-LDMOS, 60V/120V HV-LDMOS and island.
- Rich options included parasitic Zener/JFET
- PDK and industry standard CAD tools are supported
- Supporting Thick metal layer
 
 Application
- Power tools
- Ninebot
-Unmanned aerial vehicle
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 1.0μm 25V 40V HV
 
 Overview 
        1.0μm 25V 40V HV是公司的标准高压工艺平台之一。是以较少光刻层数实现的经济高压工艺,工艺特征为1.0μm 线宽,单层多晶,双层金属,应用于数模混合的高压产品,工艺平台提供常规及隔离的5V低压CMOS、25V或40V高压CMOS器件,以及多晶高阻和齐纳二极管等器件。
为了节省芯片面积,工艺提供1.0μm 前端0.5μm后端设计规则。
 
 Key Features 
- 5V logic layout & performance compatible with the industry standard
- 1.0 micron front-end, 1.0 micron or 0.5 micron back-end design rule
- Epi process for isolated devices
- Modular concept (HR/ Zener / BJT / Special require)
- Vgs/Vds=5V/25 or Vgs/Vds=5V/40V,Vgs/Vds=25V/25 or Vgs/Vds=40V/40V HVCMOS
- High value poly resistor
- I/O cell library with 2KV HBM ESD protection levels
 
 Application 
- LCD driver/LED driver
- Power management product
- Battery protection IC